Innovation-driven
We challenge assumptions, explore broader design spaces and turn promising ideas into disciplined engineering progress.
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Amplifying wireless innovation with AI.
About AmpliFinesse
AmpliFinesse is a Paris-based semiconductor company. We combine low-noise amplifier expertise, an innovation-driven culture and AI-enabled end-to-end engineering to develop Wi-Fi and satellite receive ICs from concept through validated silicon.
Low-noise amplifier expertise
We specialize in LNA design for Wi-Fi and satellite communication receive chains where sensitivity and integration are critical.
AI-driven, end-to-end chip engineering
Our internal AI capability strengthens requirements, architecture, exploration, verification and silicon learning under expert control.
Product roadmap
Three receive bands. One focused LNA roadmap.
The following products are in development. Specifications are preliminary engineering targets and may change before commercial release.
AF / 01Planned product2.4 GHz Wi-Fi
2.4 GHz low-noise amplifier
A low-power receive-front-end LNA for 2.4 GHz ISM-band Wi-Fi devices, designed to improve weak-signal reception while limiting added noise and in-band interference.
- Frequency
- 1.5–2.5 GHz
- Gain
- 26 dB
- Noise figure
- 0.7 dB
- Output P1dB
- 16 dBm
- Supply
- +5 V / 35 mA
- Integrated matching and bias
- Low external component count
- Compact package target
AF / 02Planned product5 GHz Wi-Fi
5 GHz low-noise amplifier
A high-gain LNA covering the 5 GHz Wi-Fi band, targeting low system noise, resilient reception and efficient integration in dual-band wireless equipment.
- Frequency
- 4–6 GHz
- Gain
- 29 dB
- Noise figure
- 0.6 dB
- Output P1dB
- 11 dBm
- Supply
- +5 V / 30 mA
- Power-saving bypass mode
- Integrated RF matching
- Dual-band platform ready
AF / 03Planned product12–16 GHz Ku band
Ku-band low-noise amplifier
A broadband receive LNA for LEO satellite user terminals and gateways, designed for low noise, strong gain and compact phased-array front-end integration.
- Frequency
- 12–16 GHz
- Gain
- 21 dB
- Noise figure
- 0.85 dB
- Input / output VSWR
- 1.8 / 1.3
- Supply
- +5 V / 20 mA
- Broadband Ku-band coverage
- Integrated RF matching
- Phased-array front-end target
How we develop our products
Internal core capabilityAI-driven engineering, from requirements to verified silicon.
AI is embedded in AmpliFinesse’s internal engineering workflow—not offered as a standalone service or software product. It expands design coverage while engineers retain architecture, judgment and sign-off.
- Purpose
- Accelerate internal chip development
- Scope
- Requirements through silicon learning
- Control
- Engineer-owned architecture and sign-off
AF / INTERNAL DEVELOPMENT LOOPProduct engineering system
Noise figureGainLinearityMatchingStabilityPowerAreaPVT & yield
AI-driven engineeringAcceleratelearn · rank · refine
01Design knowledge
Translate requirements into reusable design knowledge
Connect product targets, proven architectures, device constraints and prior results before circuit exploration begins.
02Exploration
Rank circuit candidates across RF objectives
Use AI-guided search to compare schematic and post-layout options across performance, power, area and robustness.
03Verification
Surface risk earlier and at greater scale
Analyze RF, PVT, Monte Carlo and waveform evidence to reveal sensitivity, outliers and failure mechanisms before tape-out.
04Silicon learning
Feed measured behavior into the next design
Turn characterization, test and production insight into reusable internal models, constraints and engineering decisions.
Capabilities
Capabilities behind every AmpliFinesse product.
Our internal capability stack connects RF design, validation, industrialization and application support in one controlled journey.
01
RF integrated circuit design
Architecture, schematic design, layout ownership and sign-off for high-performance RF receive ICs.
02
Low-noise amplifier engineering
LNA development balanced across noise figure, gain, linearity, matching, stability, power and area.
03
Prototype & characterization
Evaluation hardware, laboratory characterization and design refinement that connect simulation to measured behavior.
04
Foundry & manufacturing coordination
Controlled technical transfer across outsourced fabrication, assembly and test partners.
05
RF packaging integration
Package selection and integration shaped around RF performance, thermal behavior, footprint and manufacturability.
06
Application & lifecycle support
Reference matching, receiver integration guidance and technical continuity from evaluation through design-in.
Product lifecycle
From RF target to customer design-in.
One controlled lifecycle preserves RF intent as each AmpliFinesse IC moves from specification to silicon, package, production and customer evaluation.
Start with your requirementsDefine
Translate the product ambition into measurable RF, physical and commercial requirements.
Design
Create and verify the architecture with explicit decisions around performance, robustness and cost.
Prototype
Build, characterize and refine silicon, packaging and evaluation hardware.
Industrialize
Coordinate technical transfer across fabrication, assembly, test and supply partners.
Support
Support customer evaluation, receiver integration, design-in and lifecycle continuity.
Markets
Where our LNA roadmap creates value.
The initial lineup focuses on receive chains where weak-signal sensitivity, low power and compact RF integration are fundamental.
01WFI
Home & enterprise Wi-Fi
Sensitive receive paths for access points, routers and dual-band wireless infrastructure.
Receive chain02IOT
Portable & IoT devices
Compact, low-power receive amplification for connected devices and portable platforms.
Receive chain03LEO
LEO satellite terminals
Ku-band receive amplification for user terminals and electronically steered arrays.
Receive chain04GWY
Satellite gateways
Broadband receive-front-end building blocks for gateway and ground-station equipment.
Receive chain Product & application support
Plan your next RF receive chain with us.
Share your target band, sensitivity, integration constraints and program timing. We’ll identify the most relevant product path and prepare a practical design-in plan—from reference matching to receiver integration.